Reza Yazdani Aminabadi

PhD Researcher

My Background

I have worked as a R&D researcher for two years under supervision of Alireza Ghodrati at Pooyandegan Rah Saadat Co. in Teran, Iran. My research there involves in producing some embedded systems regarding the buffering and interconnection system of the health monitoring devices in an IoT network for the hospital environments. I received my Master at University of Tehran in the area of Computer Engineering, specializing in Computer Architecture. My master thesis includes proposing fault-tolerant architectural techniques for Reconfigurable Network-on-Chips. Beforehand, I received my Bachelor at Sheikh-Bahaei University of Isfahan. I designed a Proportinal-Integral-Derivative (PID) controller for the line-follower robots as my bachelor's final project.

My Research Interests

My current research interest includes studying architectural solutions for designing ultra low-power specific designs for cognitive computing applications. I am also eager to work on most of the areas of computer architecture such as fault-tolerant, high-performance, embedded, and VLSI designs.

Awards and Honors

  • HiPEAC​ Paper Award for the paper "UNFOLD: A Memory-Efficient Speech Recognizer Using On-The-Fly WFST Composition" in MICRO 2017.

  • HiPEAC​ Paper Award for the paper “An Ultra Low-Power Hardware Accelerator for Automatic Speech Recognition” in​ MICRO​ 2016.
  • Ranked as the best student for four year among the computer engineering students, beginer at 2007, at Sheikh-Bahaei University of Isfahan.
  • Ranked among the best students in the field of computer architecture at University of Tehran, 2014.
  • Managing the Robotic team (Hardware) of Sheikh-Bahaei University from 2009 to 2011.

You can find the complete information about me at my CV.