Ramon Canal Home Page

Ramon Canal

Departament d'Arquitectura de Computadors
Universitat Politècnica de Catalunya
c/ Jordi Girona 1-3, Mòdul C6-107
08034 BARCELONA
Telephone: +34-93-4054034
Fax: +34-93-4017055

About me

I am an associate professor and former Vice Dean of postgraduate studies at the "Facultat d'Informatica de Barcelona" (Barcelona School of Informatics) enclosed in the "Universitat Politecnica de Catalunya-Barcelona Tech" (UPC). I am working at the Computer Architecture Department enclosed in the VirtuOS (Virtualization and Operating Systems) group. I received the BSc. MSc and Ph.D. from the UPC. The thesis was done under the supervision of Antonio González (UPC)and James E. Smith in the University of Wisconsin-Madison and I happily spent a sabbatical at Harvard University during the course 2006-2007.

Current research

Past research

Architectural support for dynamically scheduled processors

Invited Talks (talks, seminars, keynotes, etc)

Talks

Current students

Octavio Campo (PhD) - Graduation expected 2022

Past students

Manish Rana (PhD'16)
Zoran Jaksic (PhD'15) Intel Doctoral Student Programme Honoree 2014
Shrikanth Ganapathy (PhD'14)

Intel Doctoral Student Programme Honoree 2012

Enric Herrero (PhD '11) UPC Outstanding PhD Award

Current lectures

Nanotechnology Circuit Design (Master MIRI)
Processor Design (Master MIRI)
VLSI - VLSI Design (BSc. in Computer Engineering)

Past lectures

Disseny i Tecnologia de Computadors (DTC) -Computer Design and Technology-
Disseny de Microprocessadors (DM) -Microprocessor design- (Bsc. and MSc. in Computer Engineering, curricula 2004)
Computer Architecture (Master MTI)
Processor Architecture (Master MIRI)
Introducció als Computadors (IC) -Introduction to computers-

Honors and Awards

HiPEAC Paper Award for the publication of "MeRLiN: Exploiting Dynamic Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability Assessment " in ISCA-44, 2017
Senior Member status (IEEE), 2016
Best Paper Nominee for the paper "iRMW: A Low-Cost Technique to Reduce NBTI-Dependent Parametric Failures in L1 Caches" in ICCD-32, 2014.
Recognition for Excellence in Education (2008-2012, evaluation every 5 years). Mèrits de docència d'especial qualitat (quinqueni 2008-2012). UPC and AQU Catalunya, 2013
Best Paper Award for the paper "Mitigation strategies of the variability in 3T1D cell memories scaled beyond 22nm" in DCIS 2012.
Recognition for Excellence in Education (2003-2007, evaluation every 5 years). Mèrits de docència d'especial qualitat (quinqueni 2003-2007). UPC and AQU Catalunya, 2010
HiPEAC Paper Award for the publication of "An hybrid eDRAM/SRAM macrocell to implement first-level data caches" in MICRO-42, 2010
First price in the 6th Duran Farell Award on technology and research in Spain, UPC and Gas Natural, member of the research team of the project: "Efficient processor design through clustering". (UPC press room)(UPC Informacions Magazine pp.10), 2008
Certificate of Appreciation in recognition of the inclusion of “Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability” in the Jan/Feb 2008 IEEE Micro Top Picks Special Issue on the most industry relevant and significant papers of 2007 in Computer Architecture. (certificate), 2008
Fulbright Award, Comission for Cultural Educational and Scientific Exchange between the United States of America and Spain and the Generalitat de Catalunya, 2006 (certificate).
First Price in the Epson Foundation Rosina Ribalta Award to the best thesis project in the area of Information Technologies in Spain and Portugal. (Awards web page) (Thesis Project) (Thesis Project Presentation) (Article in Teraflop), 2001
IBM Faculty Award for my work in value compression, 2000
Best Student Paper Award for the paper "Dynamic Cluster Assignment Mechanisms" in HPCA-6. (paper), 2000

Curriculum Vitae

Here you can find a brief CV of mine.

That's what I do in my spare time

Barcelona, June 2019