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Research area

Group:  High Performance Computing (
HPC)

Related Topics:
  • Multimedia
  • Vector processing
  • VLIW architectures
  • Memory disambiguation
Advisor:  Mateo Valero
 
 

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Publications

Journals

Conference Proceedings

  •  Mauricio Alvarez, Esther Salamí, Alex Ramirez, Mateo Valero. HD-VideoBench. A Benchmark for Evaluating High Definition Digital Video Applications 2007. In IEEE 10th International Symposium on Workload Characterization (IISWC-2007), pp. -, Boston, September 2007.

  • Mauricio Alvarez, Esther Salamí, Alex Ramírez and Mateo Valero. Performance Impact of Unaligned Memory Operations in SIMD Extensions for Video CODEC Applications. In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2007), pp. -, San Jose, California, April 2007.

  • Friman Sánchez, Esther Salamí, Alex Ramírez and Mateo Valero. Performance Analysis of Sequence Alignment Applications. In IEEE International Symposium on Workload Characterization (IISWC-2006), pp. 51-60, San Jose, California, October 2006.

  • Mauricio Alvarez, Esther Salamí, Alex Ramírez and Mateo Valero. A Performance Characterization of High Definition Digital Video Decoding Using H.264/AVC. In IEEE International Symposium on Workload Characterization (IISWC-2005), pp. 24-33, Austin, Texas, October 2005.

  • Friman Sanchez, Esther Salamí, Alex Ramírez and Mateo Valero. Parallel Processing in Biological Sequence Comparison Using General Purpose Processors. In IEEE International Symposium on Workload Characterization (IISWC-2005), pp. 99-108, Austin, Texas, October 2005.

  • Friman Sánchez, Esther Salamí, Alex Ramírez and Mateo Valero. Parallel Processing in Sequence Matching. In 2005 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-2005), pp. 279-282, L'Aquila, Italy, July 2005.

  • Mauricio Alvarez, Esther Salamí, Alex Ramírez and Mateo Valero. Performance Evaluation of High Definition Digital Video Decoding Using the H.264/AVC Standard. In 2005 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-2005), pp. 255-258, L'Aquila, Italy, July 2005.

  • Esther Salamí and Mateo Valero. A Vector-uSIMD-VLIW Architecture for Multimedia Applications. In The 2005 International Conference on Parallel Processing (ICPP05), pp. 69-77, Oslo, Norway, June 2005.

  • Friman Sánchez, Mauricio Alvarez, Esther Salamí, Alex Ramírez and Mateo Valero. On the Scalability of 1 and 2-Dimensional SIMD Extensions for Multimedia Applications. In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2005), pp. 167-176, Austin, Texas, March 2005.

  • Friman Sánchez, Mauricio Alvarez, Esther Salamí, Alex Ramírez and Mateo Valero. Scalability and Complexity of 2-Dimensional SIMD extensions. In XV Jornadas de Paralelismo, pp. 190-195, Almería, Spain, September 2004.

  • Esther Salamí and Mateo Valero. Initial Evaluation of Multimedia Extensions on VLIW Architectures. In Fourth International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOSIV). Lecture Notes in Computer Science, Springer-Verlag, vol. 3133, pp. 403-412, Samos, Greece, July 2004.

  • Carlos Álvarez, Mateo Valero, Jesús Corbal, Esther Salamí and Jose A. Fonollosa. A Fast, Low-Power Floating Point Unit for Multimedia. In 2nd Workshop on Application Specific Processors (WASP-2), pp. 17-24, San Diego, January 2003.

  • Esther Salamí, Jesús Corbal, Carlos Álvarez and Mateo Valero. Cost Effective Memory Disambiguation for Multimedia Codes. In Internacional Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2002), pp. 117-126, Grenoble, France, October 2002.

  • Carlos Álvarez, Jesús Corbal, Esther Salamí and Mateo Valero. On the Potential of Tolerant Region Reuse for Multimedia Applications. In 15th ACM International Conference on Supercomputing (ICS'2001), pp. 218-228, Sorrento, Italy, June 2001.

  • Esther Salamí, Jesús Corbal, Roger Espasa and Mateo Valero. An Evaluation of Different DLP Alternatives for the Embedded Media Domain. In 1st Workshop on Media Processors and DSPs (MPDSP-1), pp. 100-109, Haifa, Israel, November 1999.
 
 

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Last update: Aug 16, 2004
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